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Issue SOLVED :slightly_smiling_face:

(Solution based on @tomtor’s LMIC-Arduino fork.)

The LMIC-Arduino OTAA and ABP examples (ttn-otaa.ino and ttn-abp.ino) are now working with BSFrance-stm32 core with all three BSFrance LoRaM3-D boards:

  • LoRaM3-D L151
  • LoRaM3-D F103
  • LoRaM3-D F303

How to apply the fix:

In LMIC-Arduino src\hal\hal.cpp

Replace:

static uint8_t irqlevel = 0;

void hal_disableIRQs () {
    noInterrupts();
    irqlevel++;
}

void hal_enableIRQs () {
    if(--irqlevel == 0) {
        interrupts();

        // Instead of using proper interrupts (which are a bit tricky
        // and/or not available on all pins on AVR), just poll the pin
        // values. Since os_runloop disables and re-enables interrupts,
        // putting this here makes sure we check at least once every
        // loop.
        //
        // As an additional bonus, this prevents the can of worms that
        // we would otherwise get for running SPI transfers inside ISRs
        hal_io_check();
    }
}

With:

#ifdef ARDUINO_ARCH_STM32

    // Fix for STM32 HAL based cores.

    // ARDUINO_ARCH_STM32 appears to be defined for these Arduino cores:
    // - Arduino_Core_STM32 (aka stm32duino)
    // - STM32GENERIC
    // - BSFrance-stm32

    // This fix solves an issue with STM32 HAL based Arduino cores where 
    // a call to os_init() hangs the MCU. The fix prevents LMIC-Arduino from 
    // disabling and re-enabling interrupts.
    // While the exact cause is not known, it is assumed that disabling interrupts 
    // may conflict with interrupts required for the STM32 HAL core.
    // (Possible side-effects on LMIC timing have not been checked.)

    void hal_disableIRQs () {
    }

    void hal_enableIRQs () {
        hal_io_check();
    }
    
#else

    static uint8_t irqlevel = 0;

    void hal_disableIRQs () {
        noInterrupts();
        irqlevel++;
   }

   void hal_enableIRQs () {
       if(--irqlevel == 0) {
           interrupts();

           // Instead of using proper interrupts (which are a bit tricky
           // and/or not available on all pins on AVR), just poll the pin
           // values. Since os_runloop disables and re-enables interrupts,
           // putting this here makes sure we check at least once every
           // loop.
           //
           // As an additional bonus, this prevents the can of worms that
           // we would otherwise get for running SPI transfers inside ISRs
           hal_io_check();
       }
   }
    
#endif
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